Fast switching and on-chip time- and space-partitioning

 

 

A Hardware Context includes the complete set of registers associated with each independent software task. The Hardware Context is also linked to a context timer and memory protection circuitry that provide time- and space-partitioning between the contexts. The space- and time-partitioning within the chip ensures that one context cannot "step on" another and that no context can ever "freeze." In addition, the chip keeps track of which context is being executed - greatly simplifying debug efforts.

The on-chip priority-based preemptive scheduler, system timer and priority control automatically take care of switching between the contexts when needed. By incorporating contexts in the hardware, you get full control over context execution without the jitter associated with RTOS-controlled context switching. Additionally, since the contexts can be switched reliably in one clock cycle it allows fido to run the chip at only 66MHz with jitter well below that of a 200MHz conventional microcontroller – and with corresponding power reduction